Describe the projects you have worked on.
Asic Design Engineer Interview Questions
1,316 asic design engineer interview questions shared by candidates
I can't say exactly but one SystemVerilog question was to implement a finite state machine given a certain output. Review sequence detectors.
All questions were related to my previous experience, testing methodology, and problem solving skills. They also asked some basic oo concepts
Sequence detector with FSM Synchronization Cache
Design a CAM.
Asynchronous FIFOs. These guys love them.
Frequency divider
Setup hold time calculation
CMOS characteristics?
what do u know about virtual pages
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