Can be implemented using 8 Muxes.

sum = a xor b xor cin carry = (a xor b) cin + ab You can easiy make XOR, OR AND, NOT using 2:1 mux. So 8 mux ?!?

if Mux(I1,I2,S) is a 2x1 mux module, then Sum = Mux( (Mux(C,C',B), Mux(C',C,B), A) which requires 3 2x1 mux. Carry = Mux( (Mux(0,C,B), Mux(C,1,B), A) which requires 3 2x1 mux.

Just need 6 2-to-1 mux. First draw the truth table and try to implement using two 4-to-1 mux, AB as select and Cin/~Cin as input. It should be quite easy. Then break each 4-to-1 mux to three 2-to-1 mux.

Full Adder can be implemented by two half adder; a half adder can be implemented by a XOR and AND gate. XOR and AND gate can be implemented by 2:1 MUX.