Basics of Computer Architecture and verification
Design Verification Engineer Interview Questions
3,713 design verification engineer interview questions shared by candidates
Describe the steps involved in rendering with OpenGL a 3D scene with dynamic geometry.
OVM/UVM related concepts
UVM Phase, Mail box in SV
( I have just passed out from BTech) First round: 1) Asked about college. 2) Implement 7:1 Mux using 2:1 mux 3) Why verilog is used in this field? 4) Difference between latch and flip flop ( with waveforms). 5) You had C in engineering, why didn't you include it in your resume? C has more use , right? 6) About Major Project ( Why it is not related to VLSI?) 7) Frequency Division Circuit 8) What is the default value of wire? 9) What is the default value of reg? 10 ) Convert one hexadecimal number to binary Second Round 1) Tell me about yourself. ( I was enrolled in a program, asked about that program in detail.) 2) Design an asynchronous flipflop in verilog. 3) What is setup time, hold time? 4) What are the different types of delay and explain them? 5) Differences between RISC and CISC. 6) What are the application of counters? 7) What is a shift register explain its operation with a suitable circuit diagram? 8) Psuedo code for finding prime numbers from 1 to 100. 9) What is LSFR? 10) What is pipelining how it is implemented? 11) Could you draw the symbol of CMOS inverter? 12) What is CMOS? 13) Do you really know python? 14) What did you do in MATLAB? 15) Certifications are not enough, did you do any project related to this? Third Round: 1) Gave an AND OR circuit and asked to convert it into a MUX. 2) Difference between latch and flipflop 3) Draw a latch using only NAND gates. 4) Draw a D latch. 5) Psuedocode for checking a string in a the contents of a file in a directory of files. 6) Is MATLAB a tool or language?
Was asked if I had experience with several different online insurance interfaces and listed them.
How would you verify a multistage cache with multiple masters?
You have an array of integers. How would you find the maximum value?
explain me why uvm methodology ?
Discuss addressing schemes.
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