Synthesis constraints Timing checks - setup, hold Related discussion - setup from one FF (in fast clk) to next FF (in sync fast clk/2) Hold for the above scenario Clock Gating How to write RTL assertions
Senior Design Engineer Interview Questions
1,076 senior design engineer interview questions shared by candidates
7. Majorly on projects done
1. FSM design and comparision of FSM state encoding techniques
Smith chart, impedance matching with lumped elements. Which matching is better from a harmonic point of view. filter types and different filter characteristics.
what is your experience in delivering wireless hardware radio platforms for mass production?
why you change you job.
See above. All questions are from daily work.
CDC and digital basics
This is a part we produce, how would you assemble it to the car. Model the automated process.
Nothing out of the ordinary.
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