Phone interview went on for 2 hrs. The manager was interested in my background and projects. Got an onsite interview call in 2 days. I had 6 rounds in the onsite interview, concentrating mainly on digital circuit design. Two of those rounds were implementation design, concentrating on RTL.
The questions were mostly from basics of circuit design. They tested timing, which is an important thing to prepare. FSM based design was tested.
Interview questions [1]
Question 1
Timing questions like critical path, setup and hold violations and ways to prevent them, dynamic logic and problems with timing there etc.
Got an email for a phone interview. Set it up real quick. It last about 45 mins. Detailed computer architecture concepts on pipelining, cache design, out-of-order. Mealy-Moore advantages and disadvantages. Not too tough if your basics are good.
Interview questions [1]
Question 1
Give some examples of test vectors you may want to use to verify a CPU cache