I applied through an employee referral. I interviewed at Intel Corporation (Bengaluru) in Aug 2015
Interview
jst a direct call for face to face interviews....no written test was taken only 2 1:1 technical interviews and was informed within a week abt the result .Also complete hiring process completed within month
Interview questions [1]
Question 1
asic design flow in detail, its was complete technical interview with focus on basics and past internship work in my regard.
jst a basic vlsi basics like fsm, digital ic design, and static timing analysis
I applied online. The process took 2 weeks. I interviewed at Intel Corporation in Sep 2015
Interview
applied online.
Got the email from the manager saying a team member will be taking my interview.
One hour interview via phone call. Very simple and straight forward questions.
Few days later, i got background verification forms. once they were filled, i got email from HR saying that she is extending the offer on behalf of my manager. After accepting the offer, i was given the onboarding forms three weeks before.
Interview questions [1]
Question 1
Pipelining, How have you used assertions in SV?, Perl basics.
Basic digital design questions
I applied online. The process took 3 weeks. I interviewed at Intel Corporation (Folsom, CA) in Sep 2015
Interview
I got a call by mailing HR. There was a 1.5 hour phone screening after which I was called on-site to Folsom. There were 4 rounds and a lunch with the team. Got the results just 2 days after the interview.
Interview questions [1]
Question 1
Phone interview - 2 projects on resume, Mealy and Moore, FSM for a given sequence, basic cache related questions, setup hold, how to fix them, SRAM DRAM, SRAM full operation, Unix commands grep, chmod, chop, chomp, ps.
Onsite - Round 1 - Behavioral round. He was an engineer at Intel for 22 years. But he mostly asked about my resume and behavioral questions. He wanted me to ask him a lot of questions.
Round 2 - Lunch with 8 members of the team. Just casual discussion about Folsom and my school and work at Intel.
Round 3 - Complete Physical Design. Starting from the flow, she asked me every aspect of it. What are inputs to floorplan? Will it help if these inputs are available at Synthesis stage itself? what is clock tree synthesis? why is it done after placing? timing questions. How is power structure decided at floorplan? voltage delay dependence, inverted temperature dependence, sizing of gates, CMOS fabrication process and diagram, layout for CMOS.
Round 4 - Timing in more detail and more difficult questions, inverter vs buffer, SRAM layout, why higher metal for Vdd Gnd? Why resistance is lower for higher metal layers? spef saif formats, verification basics, reliability verification, functional verification.
Round 5 - Perl questions. Gave a file and asked me to extract few details using regex. Then had to use hashes to perform some operations on the extracted data. basic C++ questions and simple programs.