Intel Corporation Senior Verification Engineer interview questions

SystemVerilog assertion and functional coverage coding.

As I was an experienced professional there were only face to face interviews at Intel's Office. The schedule was setup for 6+ rounds of interviews starting @10AM-5PM. All of the rounds were technical & even during lunch and half an hour after were technical questions asked in the form of fillers(seriously!!??) All rounds went very well except for few mistakes for one or two queries. Questions were mostly on projects. Also they covered topics like Comp Arch,OS,Verilog,System Verilog,Methodologies,Puzzles. After the final round the interviewer told that I will be getting a call back from HRs. Its been two months still i haven't received a single mail/call from the HRs. Which is quite unprofessional behaviour from the reputed firm like Intel. At-least have a courtesy to tell that you are not selected or something like that!!