Noise analysis in differential pair
Analog Design Engineer Interview Questions
1,258 analog design engineer interview questions shared by candidates
Analog circuits, bandgap, LDO, CMRR, ADCs
I was asked to sketch the voltage (with respect to time) of the inverting terminal of an OPAMP used in an inverting integrator mode with OPAMP limiting its output to -5 V. Input was a step.
RC and LC filters and their working. How to make low pass/ high pass filter, how will a circuit behave on step input voltage, stability of second order systems etc.
RC circuit transient and steady state analysis.
Op amp, rc circuits, bode plot
What is input impedance of the circuit
What is S21? Why use bjt for bandgap
Multiple questions related to regulator, reference, RC circuits
Questions were on RC Circuits.
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