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Analog Design Engineer Rfic Interview Questions

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4 analog design engineer rfic interview questions shared by candidates

1. A question on low-pass filter for current input and output. 2. A question on the loop stability of a PLL. What could be done to improve the stability? 3. A question on a passive switched-cap circuit with multiple clock phases. 4. A question on R-ladder and which node has the largest noise voltage (rms) 5. Multiple RC circuit questions with pulse and step inputs on different R and C combos and different structures. 6. A question on VCO phase noise; a question on the effect of duty cycle variation on phase noise. 7. A question on VCO swings (Q-factor/ bias current etc).
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Analog RFIC Engineer

Interviewed at Qualcomm

3.8★
Apr 29, 2021

1. A question on low-pass filter for current input and output. 2. A question on the loop stability of a PLL. What could be done to improve the stability? 3. A question on a passive switched-cap circuit with multiple clock phases. 4. A question on R-ladder and which node has the largest noise voltage (rms) 5. Multiple RC circuit questions with pulse and step inputs on different R and C combos and different structures. 6. A question on VCO phase noise; a question on the effect of duty cycle variation on phase noise. 7. A question on VCO swings (Q-factor/ bias current etc).

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