How would you design a VR environment that investigates people's level of comfort in a building/hallway?
Architecture Internship Interview Questions
814 architecture internship interview questions shared by candidates
Cloud Native Development & migrations of Server and Databases
If the area of a chip is doubled, how can the power be kept constant?
Design a digital circuit that on every third cycle calculates the average between the first and the second posedge and write it in verilog
Multitude of questions around EA, objection handling, architecture, white boarding, etc.
Wie kannst du uns als Firma von Nutzen sein ?
Phone screen - I was asked all basic questions on computer architecture, verification and digital design (as the position demands these skills). Some of the questions were - what is pipelining? what are data hazards? cache size calculation why do we not get ideal CPI of 1 in an in-order pipeline? what are the features of out-of-order execution? boolean expression reduction what are blocking and non-blocking assignments (in verilog) what is the code for D flip-flop with and without asynchronous reset? On-site Round 1 - tell me about yourself code for binary search SystemVerilog classes constraints layered test bench design verification of a FIFO Round 2 - OOPS concepts advantages and disadvantages of OOPS coverage in SystemVerilog types of coverage all about my verification project Round 3 - in-order pipeline design TLB and virtual memory what is a page walk? timing question to calculate CPI (given a set of instructions - look out for a branch instruction!!!) cache size calculation question calculate block size, index, tag for a given cache configuration why do we need branch predictors? features of out-of-order pipelines? a little bit about multi-threading (something like, if all instructions in a program are stalled because of dependency, what can you do to increase throughput? Ans - multi-thread and context switch) Round 4 - Back trace a set of gates given the output value FSM for a parity checker and it's corresponding hardware design memory address splitting logic design the hardware given a verilog code and write the code more efficiently (use verilog operators) Lunch - The most fun round of all! It was lunch with the manager along with all the other candidates who are interviewing on that day and a few other members of the team may (or may not) join. This round will be all about the place and the team and work life culture. Have questions ready to ask the manager and the team members. And make sure to be very conversant and keep things light and alive. It makes everyone in the room happy. Grab a water bottle here because you may need it if you have interview rounds scheduled after lunch. You can tell them about where you come from and what you do there. They like people who can keep them rapt and who is a people person. Eat light and have coffee if you want. Take a restroom break because you may not get a chance later till the end of the day.
Lets talk about the 5 stage pipeline CPU you simulated in school. Walk me through what different kinds of structures are needed. And this kept on going from Instruction Fetch till Instruction Commit.
Pseudo code for MUX Setup and hold time
what is segmentation, difference between encryption and hashing, what are they for and etc., some basics about OT - what is SCADA, PLC
Viewing 801 - 810 interview questions