It's about a clock frequency problem, something related to time borrowing.
Asic Design Engineer Interview Questions
1,315 asic design engineer interview questions shared by candidates
Sequence identification circuit design
Number of bits representation for a given math function
Setup time, hold time?
IO Budget / Timing: Since I was out of touch on this topic, I was not very well prepared on this. But I think I handled it well Also, was surprised to see a question like: How many ping pong balls would you need to fill up a 20X20 meeting room? etc. The idea was to see more on how I'd approach the problem and not necessarily give the right answer.
Design a Verilog module that generates the perfect squares of natural numbers starting from 4.
How do you reduce time complexity from O(n) to O(log2n) (for above subroutine)?
Draw a FSM sequence detector
Explain previous projects worked o
CDC and metastability and ways to implement synchronizer in circuit, also how to use asynchronous FIFO and the logic goes in building FIFO
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