RTL question and memory access question.
Asic Design Engineer Interview Questions
1,316 asic design engineer interview questions shared by candidates
Basics of digital electronics and verilog and sv
Low power RTL design techniques
Tell me about your projects, and what was your deisgn experience
Technical
what is congestion and what are the causes
What is volatile command in C language?
Do you known where the bitstream goes in order to program an FPGA (Describe the FPGA flow and what specifically the bitstream does)
Describe this certain project that you had worked on, what were the requriementes, outcome, etc
What is handshake mechanism in uvm and explain how to override
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