7. Dual port RAM operation (if read and write req to the same location at a time?)
Asic Design Engineer Interview Questions
1,316 asic design engineer interview questions shared by candidates
6. STA concepts
Basic Digital Electronics and CMOS fundamentals
Q: Code for algorithm to sort an array of signed integers (can't use any built in language support for sorting).
Q: Code a Verilog snippet for clock with duty cycle != 50%.
ASIC and PNR flow
Basic questions on Digital electronics and C programming.
traffic light controller question based out of counter
Mostly related to VLSI domain.
What was the biggest challenge you've met during your previous work?
Viewing 721 - 730 interview questions