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Asic Design Engineer Interview Questions
1,316 asic design engineer interview questions shared by candidates
draw xor gate cmos diagram.
fifo deepth calculation using 1 32-bit adder to add two 64-bit data detect every value 1-bit position for a signal
They asked me to write the Verilog code for a D-Flip Flop. I had forgottend verilog, so I asked them if I could write it in pseudo-code. I dervied and wrote the code from first principles. I think this impressed them.
How to verify your design ？about testbench design ...
Why do you want to work here?
FPGA question
UVM Verilog Verification thinking Logic gates
Describe two ways to double throughput in this provided circuit.
Design an efficient circuit to convert thermometer code to binary. How would you pipeline it?
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