Skip to contentSkip to footer

Design Rtl Interview Questions

Salaries
Interviews

272 design rtl interview questions shared by candidates

Difference between 60nm and 28nm, basic questions on resume, effects of technology scaling, C and data structure questions postrde, inorder, preorder, different types of sorting techniques, calloc malloc, classes, objects, function overloading, operator overloading, BST, how does data structure apply in your project
avatar

RTL Design Engineer

Interviewed at Xilinx

4.2★
Aug 24, 2015

Difference between 60nm and 28nm, basic questions on resume, effects of technology scaling, C and data structure questions postrde, inorder, preorder, different types of sorting techniques, calloc malloc, classes, objects, function overloading, operator overloading, BST, how does data structure apply in your project

Sure, here's a common Verilog interview question: **Question:** Explain the difference between blocking and non-blocking assignments in Verilog. **Answer:** In Verilog, blocking assignments (`=`) are executed sequentially in the order they appear in the code. This means that the right-hand side (RHS) is evaluated immediately, and the assignment is performed right away. Non-blocking assignments (`<=`), on the other hand, are used for modeling concurrent behavior. They allow multiple assignments to happen at the same time, without being influenced by the order in which they appear in the code. The RHS is evaluated immediately, but the assignment is scheduled to occur after all other statements in the current time step have been evaluated. This distinction is crucial for modeling digital circuits accurately, and using the appropriate assignment type depends on the intended behavior of the design.
avatar

Rtl Design Engineer

Interviewed at Young Minds Technology Solutions

3.3★
Sep 15, 2023

Sure, here's a common Verilog interview question: **Question:** Explain the difference between blocking and non-blocking assignments in Verilog. **Answer:** In Verilog, blocking assignments (`=`) are executed sequentially in the order they appear in the code. This means that the right-hand side (RHS) is evaluated immediately, and the assignment is performed right away. Non-blocking assignments (`<=`), on the other hand, are used for modeling concurrent behavior. They allow multiple assignments to happen at the same time, without being influenced by the order in which they appear in the code. The RHS is evaluated immediately, but the assignment is scheduled to occur after all other statements in the current time step have been evaluated. This distinction is crucial for modeling digital circuits accurately, and using the appropriate assignment type depends on the intended behavior of the design.

Viewing 141 - 150 interview questions

Glassdoor has 272 interview questions and reports from Design rtl interviews. Prepare for your interview. Get hired. Love your job.