1. C++, OOP 2. python: dictionary, swap values 3. Systemverilog: fork join 4. delete repeated element in an array 5. FIFO depth 6. find SA0/SA1 amoung 128 wires in minimal steps
Design Verification Engineer Interview Questions
3,719 design verification engineer interview questions shared by candidates
Design an fifo using the language of your choice and describe your thought process
They asked me basic oops concepts and my projects
Questions on C++, Perl, System Verilog.
Questions on memory consistency (during phone screen). Reorder Buffer/ History buffer implementation
design a NAND and XOR gates using MUX
Count the switched on bits of a given binary number.
Can you talk about your past experiences?
General questions about C, pipelining, caching, hazards and more C.
Functional coverage vs. Code Coverage
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