Cache Coherency, UVM and TLM related, SV concepts, Past projects.
Design Verification Engineer Interview Questions
3,713 design verification engineer interview questions shared by candidates
A function that calculates the number of bits turned on on a certain number
Diferencia entre latchs y flip-flops Proyectos destacables de la universidad ¿Como le bajarias la corriente al circuito para que no gaste mucho voltaje?, entre muchas mas.
Create a fifo and test it.
Was asked about basics of computer architecture, Digital Design and verilog
They asked about uvm fundamentals. They were looking for strong uvm experience and asked me to write code for scoreboard, monitor and asked about how to connect them.
Medium assertions questions. They were related to grant
How weird are you? I'm not joking
Explain how an out-of-order processor works? How do you implement register renaming? Difference between an architectural and physical register file
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