Basic digital design questions, constraints, assertion.
Design Verification Interview Questions
3,716 design verification interview questions shared by candidates
Basics on ddr verification and functional coverage
What are your strengths and weaknesses? How do you manage your time?
cache coherency related like MSI
UVM based questions and Assertions and constraints
Write a SV model for comparator
Create a 4-to-2 priority encoder using only basic logic gates. Then use those encoders and MUXs to create a 16-to-4 encoder. Create a state machine to show if a binary number is divisible by five.
Assertion to check the waveform
Look at these two statements: x, y are real finite number for all x, there exists a y such that y >x there exists a y such that for all x y >x 1) What is the difference between the two statements? 2) Do you think they are wrong ? Why ?
1. What are the pros and cons of adding an extra stage in a CPU 2. Follow-up: How does adding a stage affect the setup time and hold time
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