Simple but a very interesting question. I was given a Verilog code of about 60 lines and I was asked on whiteboard to explain how that RTL will get synthesized to, as in depending upon priorities what muxes & how the counter will be synthesized.
Dft Engineer Interview Questions
148 dft engineer interview questions shared by candidates
Design a blackbox function using design logic
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Competency & Micro/Macro Questions
Goals of DFT MBIST implementation
Struck at fault, test vector inputs
Because it is a DFT, testing related position. They expected the candidate to be very familiar with Perl. Several detailed questions were asked. Such as data structure.
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Tell me about your work experience.
Difference between latch and flop
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