What exact model of FPGA did you use for your previous employer's solution?
Fpga Design Engineer Interview Questions
681 fpga design engineer interview questions shared by candidates
Assuming you are unable to use the division (or multiplication) operator, write a function in C, that takes in two integers and returns a result the same way the `/` operator does in ANSI C.
How you can define a FPGA processor?
build module that takes a 2-bit state input (the state value is the actual input to the module) from another module, and changes a single bit output value based on which state you transition to next. These states come from a module in 10 MHz clock domain, You want to write out this 1 bit data from your module at 100 MHz ensuring that the output is stable before 80ns has passed after the state change. Clk to q delay less than 1 ns.
How is a mux created with a LUT.
Asked to implement the logic using OOP
What are some techniques to improve latency.
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How can you solve metastability problema in sampling process?
Digital Logic Principles.
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