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5,136 hardware engineer internship interview questions shared by candidates

Essendo il colloquio per una posizione junior le domande erano tutte relative alla tesi o ad alcuni progetti svolti in università, Per quanto riguarda la tesi ho trovato le domande tecniche molto specifiche per capire nel dettaglio cosa avessi fatto e testare il mio livello di preparazione. Ritengo però che mi hanno messo a mio agio lasciandomi capire che non era un esame ma volevano capire come lavoravo e ragionavo.
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Hardware Engineering

Interviewed at ALTEN

3.5★
Oct 19, 2023

Essendo il colloquio per una posizione junior le domande erano tutte relative alla tesi o ad alcuni progetti svolti in università, Per quanto riguarda la tesi ho trovato le domande tecniche molto specifiche per capire nel dettaglio cosa avessi fatto e testare il mio livello di preparazione. Ritengo però che mi hanno messo a mio agio lasciandomi capire che non era un esame ma volevano capire come lavoravo e ragionavo.

Q: how will we setup a lineup? What are disadvantages if we use Filter as first stage. Q: What is EVM? Q: Scenario: Assume TX side gives B1UL output and RX is receiving B1DL/B3DL and B7DL. What parameters will you investigate? Q: Why does a device has nonlinearity? Q:worst return loss possible? Q: how would you match two points in smith chart? Which one would you choose among 4 types matching? Answer: first I will ask what BW is needed? Q: why do we want our system to be linear? What is intermod? How much intermod will increase with 1 dB increase in Pin? Channel leakage Q: How will you model non-linearity. You don’t have any data. Where does it come from? Q: how will you find IIP3? Q: how will you find noise floor of Spectrum Analyzer? Q: why do we see saw tooth noise floor at very low noise floor in Spectrum Analyzer? Q: how does line impedance change if you make it wider? How ideal line impedance can be expressed in terms of lumped model? Q: How does the wave travel in microstrip line? Which gnd do we want closer to coplanar microstrip line – gnd below the trace or the gnd on the same plane? Q: how will constellation diagram change if we 1. increase gain in I component. 2. Introduce Phase noise.
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RF Hardware Design Engineer

Interviewed at Apple

4.2★
Oct 8, 2021

Q: how will we setup a lineup? What are disadvantages if we use Filter as first stage. Q: What is EVM? Q: Scenario: Assume TX side gives B1UL output and RX is receiving B1DL/B3DL and B7DL. What parameters will you investigate? Q: Why does a device has nonlinearity? Q:worst return loss possible? Q: how would you match two points in smith chart? Which one would you choose among 4 types matching? Answer: first I will ask what BW is needed? Q: why do we want our system to be linear? What is intermod? How much intermod will increase with 1 dB increase in Pin? Channel leakage Q: How will you model non-linearity. You don’t have any data. Where does it come from? Q: how will you find IIP3? Q: how will you find noise floor of Spectrum Analyzer? Q: why do we see saw tooth noise floor at very low noise floor in Spectrum Analyzer? Q: how does line impedance change if you make it wider? How ideal line impedance can be expressed in terms of lumped model? Q: How does the wave travel in microstrip line? Which gnd do we want closer to coplanar microstrip line – gnd below the trace or the gnd on the same plane? Q: how will constellation diagram change if we 1. increase gain in I component. 2. Introduce Phase noise.

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