1.Inverted temperature effect on STA. the question was based on temperature effects on delay below 65nm technology. how STA works under those conditions at different corners. 2. An interesting question about how latency affects jitter. 3. Maximums kew allowed when lock up latches are used. 4. OCV n questions based on it. 5. CRPR. 6. how does a cell get min n max delay? 7. spef file contents, questions about star-rd extractor working. 8. Internship exp based questions.
What are your strengths and how do you apply them.
If you have more than 2000 servers around the globe with DIMM issues out of the factory (vendors), How you define this is a manufacture issue and how you coordinate with the vendor to get them all fixed?
Showed me a schematic asked what a resistor and diode do in the circuit.
Where do youbsee yourself in 5 years?
One was how to increase the clock frequency of a design by pipelining.
What's the difference between window and frame in tkiner?
Please discuss the differences between USB 2.0 and USB 3.0
what is malloc?
Basic Verilog and Digital Electronics questions, regarding project, C programming, System Verilog questions, puzzle questions, static timing analysis, hold and setup times, Computer architecture, python.
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