Give all the ways you can minimize delay of multiple gates in series?
Physical Design Interview Questions
3,255 physical design interview questions shared by candidates
Floorplan,CTS ,Route, STA & Redhawk
Complete PNR flow and each stage questions STA basics to advance concepts Scenario based questions
Clock gating vs Power gating
Questions on Digital electronics, CMOS, Physical Design and LVS
Extensive discussion based on every flow topics, project experience.
build not-nor-nans-xor with nmos and pmos
How do you make an inverter
Timing, Low power, Routing, PD flow, Tcl
What are the steps in physical design flow..? Explain about all the steps.?
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