write down an inverter build from cmos transistors
Physical Design Interview Questions
3,255 physical design interview questions shared by candidates
Cmos transistor behavior and questions on my projects
How I deal with conflict.
Team work related, problem solving, conflict resolution, time management, organization
Show me a cross section layout of nand gate using cmos.
Telephonic:Process and Temp variation for delays,Voltage and TEmperature effect on Metal LAyer,Synthesis flow:Inputs.How do u do floorplanning.?Power types and methods to control,DRC,challenges during placementa nd congestion Onsite; First ROund:Whole RTL to Netlist flow in detail,Timing correlation,miller effect,virtual routes),Sceond ROund: How do u solve DC and ICC correlation:DC putting lots of buffers-Reasons,How will u solve clock transition if sizing is not posibble(Explain MErging), 3rd Round : TECH DRC Questions :One problem was given :write a script to replace with right optimized via in power plan .4th Round :STA problems,3 equations -waveforms;derate effects,positive and negative edge flops at capturing end.5th ROund: Custom Bus routing (How to do manually for timing critical path),Script to find occurences of via in design by reference name and reduce runtime by not using get_cells twice.
Questions on digital circuits, VLSI funadmentals, HDL
Inputs and outputs to each stage in the vlsi design
What is setup & hold MOSFET basics Digital & analog electronics basics Basic pv knowledge & PD flow
Tell us about a time when you had a conflict at work and how you resolved it.
Viewing 2681 - 2690 interview questions