questions based on MOSFETs, power gating,clock gating and my projects.
Physical Design Manager Interview Questions
3,254 physical design manager interview questions shared by candidates
Power gating, clock gating etc
Why are you interested in working here?
explain synthesis process, and problem.
Setup hold time dependency factors in a flip flop
Draw CMOS circuit of some gates. Write script to identify missing random number.
Setup and hold constraints for negative and positive clock skew
tell me about your block
Timing analysis, digital logic design, transistor sizing and parasitics.
Wanted to know my core values/ethics and my time management skills
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