DCG related, how to fix timing? Verilog RTL case x, case z, DFF, Dlatch Perl scripting TCL scripting in PT ICC Design patitioning
Physical Design Manager Interview Questions
3,254 physical design manager interview questions shared by candidates
What is the NAND scheme of a D trigger?
Psychological and Analytic questions would take a conscious presence of mind to go through, The question includes technical knowledge with twists
Design a Flip Flop using transistors.
Q : explain all basic concepts of STA
basic on STA, Physical Design flow
Device characteristics, channel length modulation, body effect, why leakage increases as we continue to scale
VLSI lower power design techniques, FSM sequence detection, transistor layout, combinational circuit design, timing (setup, hold time), floorplanning, noise, crosstalk
How can you switch the value of two registers without additional space?
Positive skew, Is half cycle path better for setup or hold?,UPF, power gating, PT scripts (get timing paths questions),ICC fixing, path groups, how to wake up the chip
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