PLL related questions
Post Silicon Validation Interview Questions
77 post silicon validation interview questions shared by candidates
1st round: Questions from the resume about projects. 2nd round: PLL design, OPAMP basic questions about VDD
Can you explain and draw a Frequency multiplier and divider
three horses are having a race. at the finish line of each lane there is a detector which gives a logical '1' when a horse crosses the line. design a circuit which will let you know which horse won the race (even if checked after a long time)
Nvme protocol analyzer, oscilloscope, describe current and past projects
What is bounded and unbounded signal jitter?
Caches, USB, MESI protocol,
built counter of ones with 7 inputs and 3 outputs using FA
Microcontroller, I2C questions and C language
descibe and interprete the SNR
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