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Phone interview questions were about yourself, current job role, why this position, how can you relate to this position, the difference between a latch and FF, NMOS working, 3 NMOS in series(calc output voltage across 3rd NMOS) and a few more basic device physics question. Onsite interview was divided into 4 rounds. First round with a panel of 3, about 3-d cross-point memory, it working(as it was for 3-D cross point PE), logic questions, C code based Qs(recursion), about my present project(SerDes Rx blocks), how to validate a particular block in the SOC, when u can't control the design parameters. Validation and verification concepts(I'm more into design engineering background, so I couldn't answer validation/verification concepts), logic Qs, programming(recursion) with address shift(LSB) nmos working. Later lunch with senior engineer with regular Qs about my experience and background. Next, another 3 people panel interview more into technical, Id wrt to Vgs for NMOS, decoder circuit design(digital circuit design, boolean expression, realizing AND gate based circuit), a transmission gate(advantage over NMOS), current mirror and load resistor on both sides R and 100R of it, how to validate it and a few more basic Qs which were more into verification/validation perspective.
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NVM Product Engineer

Interviewed at Micron Technology

3.9★
Apr 23, 2018

Phone interview questions were about yourself, current job role, why this position, how can you relate to this position, the difference between a latch and FF, NMOS working, 3 NMOS in series(calc output voltage across 3rd NMOS) and a few more basic device physics question. Onsite interview was divided into 4 rounds. First round with a panel of 3, about 3-d cross-point memory, it working(as it was for 3-D cross point PE), logic questions, C code based Qs(recursion), about my present project(SerDes Rx blocks), how to validate a particular block in the SOC, when u can't control the design parameters. Validation and verification concepts(I'm more into design engineering background, so I couldn't answer validation/verification concepts), logic Qs, programming(recursion) with address shift(LSB) nmos working. Later lunch with senior engineer with regular Qs about my experience and background. Next, another 3 people panel interview more into technical, Id wrt to Vgs for NMOS, decoder circuit design(digital circuit design, boolean expression, realizing AND gate based circuit), a transmission gate(advantage over NMOS), current mirror and load resistor on both sides R and 100R of it, how to validate it and a few more basic Qs which were more into verification/validation perspective.

There are many questions on device physics such as MOSFET theory, how the device works and how changing certain parameters such as dielectric properties changes how the device reacts. They'll also ask you basic logic questions about nands and XOR gates, and possibly have you draw the basic layout of one. They also throw some curveballs at you that pertain to their specific manufacturing which is how the floating gate operation works, and how do you utilize it in practice.
avatar

Product Engineer

Interviewed at Micron Technology

3.9★
Feb 22, 2015

There are many questions on device physics such as MOSFET theory, how the device works and how changing certain parameters such as dielectric properties changes how the device reacts. They'll also ask you basic logic questions about nands and XOR gates, and possibly have you draw the basic layout of one. They also throw some curveballs at you that pertain to their specific manufacturing which is how the floating gate operation works, and how do you utilize it in practice.

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