he asked me about the metal layers in lvs process.
Rfic Designer Interview Questions
82 rfic designer interview questions shared by candidates
Current mirror biasing, draw I vs V
Smith Chart... Regions (inductive, capacitive, matched)
Some questions relates to projects on my resume. Some basic analog question about current mirror , bode plot, rc filter , bias circuit structure
Describe a CMOS current mirror.
basic LNA, smith chart, NF, P1db question
explain rf front-tend project and expanded
RF basic concepts, Smith Charts, projects covered in resume
Noise figure for LNA and phase noise for VCO
what is your strength?
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