CDC Timing and RTL code for few counter logics
Senior Design Engineer Interview Questions
1,076 senior design engineer interview questions shared by candidates
Basic PnR flow questions were asked. One should have in-depth knowledge of MOS transistor level insight. I had a very bad experience with one of the interviewer & to my shock he was the director of the team. He was asking about my caste / religion & ancestral background which was highly unprofessional. Really feel for the engineers working in such a company under such top level management. Doesn't recommend anyone this company as first choice.
FIFO size calculation, CPU bus interface questions
Fixed priority arbiter, Arbiters(4 clients 2 with fixed priority and 2 with round robin), FSM(sequence detector, Lift Controller), How to change reset value of register during an ECO
1. design of structural componenta with SFD BMD and techical applications.
Basics of clock gating and virtual clocks
the job related physical design questions
Phone interview was about 15 to 20 questions in 45 minutes. I would most definitely recommend studying Razavi's 2nd edition analog design textbook whether you are applying for RFIC or Mixed Signal. Half of questions I was asked are on fundamental things starting from MOS transistors and device physics to Op amp design and Bandgap. The other half were on my specialties. If you are a PLL designer, you will be asked synthesizer questions. If you are an ADC designer, you will be asked ADC... and so on. Some of the questions that kept showing up through these interviews from both Qualcomm and other companies were the impedance transformation by MOSFET: what happens to the impedance of a resistor when it is in series with a MOSFET gate, drain, or source (source degeneration, input impedance of CG amplifier, CD amplifier, and so on). Bandgap will probably be asked. Impedance matching, if RFIC. I think that the outcome of the interview is highly dependent on the quality of the research presentation. If one claims to have done a design of such and such blocks, then one is expected to know pretty much everything about the block.
Questions on UVM concepts like sequencer driver communication, monitors , scoreboards and coverage
Upf commands CTS and power relation Mscts advantages Low power techniques
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