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Basic Verilog questions, FSM, Synchronizers, Clock Domain Crossing, Sequence detectors, Clock divider circuits, FIFO, Async FIFO, Circuit to detect the number of 1's using adders and then using only combinational logic, Transpose a Matrix using C. I was asked to code on almost all of the topics mentioned above.
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Soc Design Engineer

Interviewed at Intel Corporation

3.9★
Nov 8, 2017

Basic Verilog questions, FSM, Synchronizers, Clock Domain Crossing, Sequence detectors, Clock divider circuits, FIFO, Async FIFO, Circuit to detect the number of 1's using adders and then using only combinational logic, Transpose a Matrix using C. I was asked to code on almost all of the topics mentioned above.

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