Designing multiple Gates or some basic logic using Multiplexers. Draw state Diagram & verilog code for 1010 sequence detector.
Verification Engineer Interview Questions
3,719 verification engineer interview questions shared by candidates
Questions were from device physics, Analog Design basics like a current mirror, charge pump, LC-VCO, lumped components based circuits, Analog layout, PVT variations effects on basic analog blocks, so on, mostly from my previous work experience.
Setup and hold constraints in a circuit
Design issues in asynchronous FIFO
What will you do in case one of the projects gets a customer complaint? How will you handle it - giving feedback to the project members and making sure that the same problem never gets repeated in future?
How to benchmark the results for FEA software testing?
What projects you used ANSYS? Describe them and they ask follow-up questions.
Why ANSYS? How did you find about us?
What subject do you like the least?
Explain about the AXI write process with signal descriptions
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