what are the problems that happen in a system when there are different clock domains and how do u fix that?
Verification Engineer Interview Questions
3,719 verification engineer interview questions shared by candidates
Nothing unexpected.
They ask if you're okay with being on the phone most of the time, how can you work on fast paced environments and if you know how to calculate income (biweekly, semi-monthly, weekly pay)
Where do you see yourself in the future? (technical, leading, or managing)
What is the probability that we going to have a hit on a cache if the TAG is XXX on a 32 or 64 bit ?
Asked about how I would approach solving problems.
1. SV constraint 2. UVM 3. Resume review
Tell me a time you had to deliver bad news.
Questions on analog designs and filters. Questions on digital designs. Questions on SystemVerilog and Verilog.
How do you verify a FIFO design formally? Design of Round robin arbiter For how many values of n does n/(2020-n) be the square of any integer?
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