Tell me about yourself and then questions on verilog
Verification Engineer Interview Questions
3,719 verification engineer interview questions shared by candidates
Verification basics related to SV
Mostly asked basic digital design questions. Draw a sequential circuit, what is the makeup of an FPGA (LE, Registers etc), Draw a mod 10 counter, draw the schematic for a half adder. Once i drew the schematic for it i was then ask to draw it as if i had only NAND gates.
Various different questions about myself and competency questions
Have you ever managed a team before
Name a time where you had to deal with an irate customer. How did you handle the situation?
Boring and unrelated material. Don’t bother applying.
Depends on the profile and technology.
What kind of object-oriented programming experience have you had?
basic electronics questions.
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