Verification Engineer Interview Questions

3,716 verification engineer interview questions shared by candidates

Resume questions: Tell me about yourself (what courses you have taken and what areas of interest etc.) Describe 3 of your projects (one design project, one verification project and one architecture project) (details of each project was asked - like what was the clock period of your design, what language did you use, what do you mean by setup and hold time) After each project, I was asked what technical skills I had gained from each of them. Technical questions: 1. design question - given a code and asked to identify whether it was a sequential or combinational circuit and if sequential, how many clock cycles? 2. given a function (say c++ function) and asked what the outcome of the function was for a given input value (the function was for finding the nearest power of 2 lesser than the given integer) 3. design question - quickest algorithm to find the highest position of 1 (find the 1st '1' going from left to right) in a 16-bit input value. 4. list uvm component phases
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GPU Verification Engineer

Interviewed at AMD

4
Mar 2, 2016

Resume questions: Tell me about yourself (what courses you have taken and what areas of interest etc.) Describe 3 of your projects (one design project, one verification project and one architecture project) (details of each project was asked - like what was the clock period of your design, what language did you use, what do you mean by setup and hold time) After each project, I was asked what technical skills I had gained from each of them. Technical questions: 1. design question - given a code and asked to identify whether it was a sequential or combinational circuit and if sequential, how many clock cycles? 2. given a function (say c++ function) and asked what the outcome of the function was for a given input value (the function was for finding the nearest power of 2 lesser than the given integer) 3. design question - quickest algorithm to find the highest position of 1 (find the 1st '1' going from left to right) in a 16-bit input value. 4. list uvm component phases

Asked about project work mentioned on your resume in depth. Asked about post increment and pre increment question in C++. Asked Polymorphism, OOP concepts in C++. Asked about non blocking and blocking statements in SystemVerilog.
Feb 13, 2024

Asked about project work mentioned on your resume in depth. Asked about post increment and pre increment question in C++. Asked Polymorphism, OOP concepts in C++. Asked about non blocking and blocking statements in SystemVerilog.

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