A question about a house with 4 light bulbs
Verification Engineer Interview Questions
3,712 verification engineer interview questions shared by candidates
Bjt. Current. Voltage. Electronics etc
Read after write sequence implementation
Given an error message, what could be the issue.
Virtual Methods , Virtual classes and their difference in system verilog
Object overriding and overloading. Callbacks, mailboxes and semaphores
Questions around GPU pipeline and how it works. Command streamer etc
Exaplain about your project and entire data path of RISC V architecture
A design has 2 types of cmds - read and write packets. You need to send 10 back to back cmds through a sequence in such a way that after a write cmd was previously sent, you cannot immediately send a read cmd. However, the 1st cmd sent can be write cmd.
Name and describe the differences between SystemVerilog forks.
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