One of the most common question was like this was asked in all 4 rounds was about CMOS Inverter Characteristics and deep diving into the concepts from there and RC,RL,RLC and LC circuits
Verification Manager Interview Questions
3,719 verification manager interview questions shared by candidates
A dsa leetcode medium on strings
describe what is virtual function. and difference between that and pure virtual function?
Digital Logic design questions
What is meant by code coverage ?
Write a FIFO architecture in Verilog
Create a assertion in UVM?
My enthusiasm about GPU Verification, and knowledge.
Basic digital, verilog questionscan be answered if you know the concepts well, Sv was totally into randomization , coverage and assertions. Uvm basic things initial rounds and in depth in last round. In manager round all digital, verilog, sv and uvm were covered
Draw MOSFET ID vs Vgs and Vds characteristics
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