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Verification Manager Interview Questions
3,716 verification manager interview questions shared by candidates
1. explain college project
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What I know about verilog
Tomasulo project
Simplify the following circuit: One adder takes A and B as input, another adder takes C and D as input. Both adder's output connects to a MUX controlled by signal S, and the output of the MUX goes into a FF
they ask me my preference of work
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Second interview question: Given the following assembly commands: MOV Ri <-- Rj/immediate (put register j or immediate value into reg i) INC Ri (++) DEC Ri (--) JNZ Ri (jump not zero) 1. Code an assembly program that calculates x*y where x and y are unsigned integers 2. What values of x and y will cause the program to fail? 3. Modify the program to deal with these values 4. What result will we get if we run the program with values from question 2 and no modification from question 3? 5. Is it possible to answer question 1 without MOV command? Prove it!
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