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Verification Specialist Interview Questions
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Q: Basics of system verilog classes, creating parent class object using child class handle, $cast concept. Fork-join processes, how is control handed to code outside the fork in the 3 cases; code a watch-dog timer to time out if an event does not occur by the end of certain transaction.
What is split completion in PCI-X?
Question from digital electronics, verilog ,System verilog, UVM and assertions.
Explain a Verification Environment
Basic Digital Concepts
Client Interview is main and is as per experience.
How would you test for a worst case scenario execution time?
What are the major components of a mobile embedded system (smartphone) and on a system level (memory, etc) how would a software update be carried out?
Basic questions related to System verilog, UVM, Verilog, Computer Architecture and Design, Testing.
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