FSM to detect sequence
Verification Specialist Interview Questions
3,713 verification specialist interview questions shared by candidates
asked about uvm and system verilog.few questions about sv constraints
Generate a clock divider using or gate
Technical questions: the same as LeetCode questions - Merge Sorted Array
Traversal of a binary tree to find given value
write a system verilog code to merge two sorted array and create a merged sorted array
Mainly riddles, about gates and other components
Microprocessors, flipflops.
Questions were on digital design, FSM, waveform analysis, verilog coding with inter and intra delays, SVA, test bench scenario writing, CPU vs GPU and pipelining.
Q: Given a stack class implementation (LIFO) - there are 3 methods - push(), pop(), isempty(). Write a class using objects of given class to implement a FIFO. Q: Write a code for this condition, string - tell if it is valid. "{}" it is valid. "}{" not valid. Q: A computer system uses a two-level page table for address translation. Given that the system has a 32-bit virtual address (VA) space and a 32-bit physical address (PA) space, and it utilizes a 4 KB page size: a.How many bits in the VA are used for the page offset? b.If the remaining bits from the VA are split evenly between the two levels of the page table, how many bits are used to index into the first-level page directory and the second-level page table? c.Calculate the number of entries each first-level page directory can have and the number of entries each second-level page table can have. d.Given that each page table entry (PTE) is 4 bytes, determine the size (in bytes) of a second-level page table. Q: write a function to set a particular field of register to the desired value. (For example, set bit 3 - 10 of a word to the given value) Q: Object slicing and many OOPs related questions
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