Static Timing Analysis, Setup time, Hold time, Clock gating, Clock Path Pessimism Removal, Digital design flow, Vmin
Asic Design Engineer Interview Questions
1,316 asic design engineer interview questions shared by candidates
Questions on FIFO, FIFO Design, setup and hold time
How to verify a fifo?
Create a module that implements a vending machine.
Do you have any experience with verification?
Tell me about a time when you faced a challenge.
Tell me about your experience working with/leading a group.
Your'e given a matrix MxN of 0's and 1's. everytime you encounter 1 cell, you need to put 0's in the rows and columns.
How do you overcome CDC issues? Detailed questions on each method
Setup and hold violation of given circuit
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