3. Adder design: use 2 64-bit adders to build an 128-bit adder.
Asic Engineer Interview Questions
1,316 asic engineer interview questions shared by candidates
Design an arbiter. This was detailed and went on for the whole 45+ mins.
The rest were general knowledge: clock domain crossings, cashe, power reduction.
About fabrication
setup time of a latch
No difficult question
Some computer architecture questions like pipeline design and pipeline hazards
Lots of questions about RTL design. Hard to remember every single one. But it's really difficult.
WLM Vs SPEF modelling of netlist
What is setup and hold time?
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