How to solve CDC problems
Asic Engineer Interview Questions
1,316 asic engineer interview questions shared by candidates
I had all my questions related to my job.
What are RTL, Gate, Metal and FIB fixes?
How does a JTAG probe work
About the things in Resume
What is setup time/ hold time violation ? How are they related to the frequency.
Array, system verilog,uvm, mailbox Queue fifo configdb etc
Explaining the concepts of setup time and hold time in digital chip design
Difference between hold time and setup time violation
Wie funktionieren Flip Flops? Wie funktioniert SerDes?
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