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Cpu Design Engineer Interview Questions
222 cpu design engineer interview questions shared by candidates
32Kb cache, 2 way assoc. and 64B line. what is the cache state and line state according to MESI when. Read 0x010F30 then write 0x880F00 then write 0x010F20
I was asked in an interview a code question about the correctness of a string in terms of brackets of all kinds)}]. In addition, I was asked a question about how to implement "malloc" and "free" in C.
Basic Computer Architecture questions. How to extend a 5 stage pipeline to 6 stages. Effects of doing that etc. A few programming questions.
Pipelining, latency and throughput, Cache, types of cache, problem on set way associative cache, interrupts, Virtual memory, page fault, project.
one-hot assignment in verilog
Q: Register renaming. How it works
What year are you in university, and what are you doing?
Out of order processor, importance ILP (and it's advantages), Digital design (realizing basic gates with a MUX)
How do you think you will fit in?
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