Calculation of fifo depth for buffer from cpu to memory
Cpu Verification Engineer Interview Questions
83 cpu verification engineer interview questions shared by candidates
C programming
C, VHDL, Verilog. Microelectronics, computer architecture
On-campus: Verilog code writing, simple hardware design question using muxes and counter that was approached from different levels of abstraction. Phone Interview: Entirely computer architecture questions, including cache coherency protocols, cache organizations
find the depth of a tree in c++
computer architectures and operatives systems
Explain how an out-of-order processor works? How do you implement register renaming? Difference between an architectural and physical register file
Most Qs is very basic calculation and concept
Basic Computer Architecture questions. How to extend a 5 stage pipeline to 6 stages. Effects of doing that etc. A few programming questions.
Pipelining, latency and throughput, Cache, types of cache, problem on set way associative cache, interrupts, Virtual memory, page fault, project.
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