role related, linux based, previous experience based and Manager round
Design Verification Engineer Interview Questions
3,718 design verification engineer interview questions shared by candidates
About digital electronics and Verilog
1)Driver sequencer handshake.
Basics of Digital Electronics and Verilog
You need to design a machine that recieves T (t=0,1,2..) as an input and it's output is T^2
2 lists which are connected. find the joint element
2 rounds of Interview happened on the same day on call. Asked to code the monitor for a DUT. DUT was loaded with all the conditions with how it works which made it complex. SV constraint and some algorithm related questions were asked. All were of good quality.
Basics of Digital Electronics, Bit manipulation questions, Verilog questions, questions on pipeline
Synchronous FIFO (based on the project), Memory design, C programming questions
About scripting language python regex
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