Find a bug in Fifo verilog code
Design Verification Engineer Interview Questions
3,716 design verification engineer interview questions shared by candidates
They shared the specific scenario and asked how would I solve it. So they are checking your problem-solving skills.
Q: Why do you want to work for Wells Fargo?
Q: Tell me about a time when you were NOT able to satisfy the customer and how you dealt with that?
Q: Tell me about a time you handled a difficult customer?
why i was interested in the position
Verification plan for a given scenario, what are the possible ways we can verify.
What is the difference between calloc and malloc?
They asked: blocking, nonblocking statement, asked to write a code for a given circuit, then they asked about asynchronous, synchronous reset, how and where they are applied. In second round, they asked question based on processor design, FIFO, STA.
Phases in UVM, previous work experience and SV questions
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