Find a bug in Fifo verilog code
Design Verification Interview Questions
3,716 design verification interview questions shared by candidates
why i was interested in the position
Technical questions related to job role
What Is UVM? What Is the Advantage Of UVM?
What is your expected salary?
1) Tell me about yourself.... 2) What is your best quality?
Verification plan for a given scenario, what are the possible ways we can verify.
What is the difference between calloc and malloc?
They asked: blocking, nonblocking statement, asked to write a code for a given circuit, then they asked about asynchronous, synchronous reset, how and where they are applied. In second round, they asked question based on processor design, FIFO, STA.
Phases in UVM, previous work experience and SV questions
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