Es war ein technisches Vorstellungsgespräch, bei dem vor allem Fragen zum Lebenslauf gestellt wurden,
Digital Asic Design Engineer Interview Questions
53 digital asic design engineer interview questions shared by candidates
What greek philosopher didn't write any of his works?
Verilog code for shift register.
How to determine if a taped out chip failed hold/setup timing
UVM, Functional Verifications, Personal skills questions and pass experiences.
Design sequence detector with logic circuit diagram
Digital design basics, UVM structure, OOPs
How to implement accumulators, multipliers in digital domain?
A module has 3 input and 5 output ports. Had a discussion for rest of the interview on that design. Basically the interviewer was trying to understand what I need to come up with a design. Like, do you a clock, what are you control signals, what is the functionality etc
They asked me questions related to Static Timing Analysis. For example, things like calculating setup time and hold time slack for a path in a digital circuit.
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