latch and Flip Flop
Rtl Design Engineer Interview Questions
272 rtl design engineer interview questions shared by candidates
Core subjects, digital electronics, cmos, verilog
The interview began with fundamentals like race conditions, reset types (synchronous vs. asynchronous), and their advantages. I was then asked to write RTL code for a basic flow, with the interviewer gradually increasing complexity by adding registers and FIFO elements. In the final part, I explained my projects in detail, focusing on my contributions, design decisions, and verification approach.
Hiring managers asked about project details and tools. He was expected digital design solutions and CDC related topics. Lint and Lowpower design questions asked and given FIFO calculations. Current company job roles and responsibilities and challenges in current project
What's hash? what's link list?
What's setup and hold time? How to solve the setup and hold violaton.
What is fifo
another tough question was that you are given a small design, you are asked to tell how you test that logic. like how/what checkers to implement.
FIFO depth
nothing as such..everything was from what i had studied in BS and MS
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